Background and Objectives: In this paper, a new design strategy was proposed in order to enhance bandwidth and efficiency of power Amplifier. Methods: To realize the introduced design strategy, a power Amplifier was designed using TSMC CMOS 0. 18um technology for operating in the Ka band, i. e. the frequency range of 26. 5-40GHz. To design the power Amplifier, first a power divider (PD) with a very wide bandwidth, i. e. 1-40GHz, was designed to cover the whole Ka band. The designed Doherty power Amplifier consisted of two different amplification paths called main and auxiliary. To amplify the signal in each of the two pathways, a cascade distributed power Amplifier was used. The main reason for Combining the distributed structure and cascade structure was to increase the gain and linearity of the power Amplifier. Results: Measurements results for designed power divider are in good agreement with simulations results. The simulation results for the introduced structure of power Amplifier indicated that the gain of proposed power Amplifier at the frequency of 26-35GHz was more than 30dB. The diagram of return loss at the input and output of power Amplifier in the whole Ka band was less than-8dB. The maximum Power Added Efficiency (PAE) of the designed power Amplifier was 80%. The output P1dB of the introduced structure was 36dB, and the output power of power Amplifier was 36dBm. Finally, the IP3 value of power Amplifier was about 17dB. Conclusion: The strategy presented in this paper is based on usage of Doherty and distributed structures and a new wideband power divider to benefit from their advantages simultaneously.

A continuous-wave solid-state-based power Amplifier is designed and simulated in this paper to work as an RF injector into an ECR ion source chamber. Employing a solid-state radio frequency power Amplifier, instead of microwave tubes, leads to having higher efficiency, lower price, compact size, and longer lifetime. Also, a modular design can be achieved for designing higher output power by repeating lower power sources and Combining them. The proposed solid-state source can deliver more than 200 W power to the ion chamber with a single high-power transistor. The selected Doherty high-power transistor is internally matched to 50 ohms and does not need a bias sequence circuit. Two gain stages are applied to drive the high-power transistor. The designed RF source is simulated using the Advanced Design System (ADS) based on the measured scattering parameters of components. Simulations show an output power of more than 57 dBm with a tunable frequency bandwidth from 2. 3 to 2. 5 GHz.

In recent years, nonlinear circuit analysis techniques have been extensively investigated. One of the most important reasons is the application development of solid-state devices at microwave frequencies. Different methods have been used to analysis large signal behavior of these devices. In this paper Load-pull curves (one of design requirement) are obtained using Volterra series. The main advantage of this technique is shortening the time of computations for weak nonlinear analysis in cases such as Class A power Amplifiers. The proposed procedure has been coded in MATLAB. Using iterative methods, Loads with constant output power have been obtained. Finally the results are compared to experimentally measured values and a fair degree of calculation between them is observed.

In this paper two dimensional wave propagation is used for power Combining in drain nodes of a distributed Amplifier (DA). The proposed two dimensional DA uses an electrical funnel to add the currents of drain nodes. The proposed structure is modified due to gate lines considerations. Total gain improvement is achieved by engineering the characteristic impedance of gate lines and also make appropriate variation in the output of gain cells. All variations are done with respect to input and output reflection loss considerations. Analytical expression for the gain of the proposed DA is presented and design considerations for electrical funnel are discussed. Based on two dimensional power Combining a wide band DA is simulated using TSMC 0. 18 CMOS model in ADS which consumes 49. 42 mw from 1. 2V power supply. Good agreement between the proposed DA gain and calculated value is achieved. Although one stage DA is used, the final results yield a high figure of merit (FOM) in 0. 18 CMOS technology. The final design shows 11. 1 dB gain from near DC to 23. 6 GHz, noise figure between 3 to 5. 2dB and maximum output power of 7. 1dBm at 1-dB output compression point (OP1dB).